Design is tight after placing cells

Hello 

After placing a design all the cells are concentrated in one place, the tool takes a very long time to finish and after a lot of iterations I have geometry and shorts violations.

I set the Clock to a very low frequency (in ps) hoping to relax the timing constrains in rtl compiler. 

Period      5000000  

Delay       10000    

OutDelay 10000   

 I also used :

 modulePadding -uniformDensity true 

The utilization is very low as well (0.4)   

Also, during routing I got the following warnings from encounter:

#WARNING (NREX-28) The height of the first routing layer M1 is 0.000000. It should be larger than 0.000000

#WARNING (NREX-29) The metal thickness of routing layer M1 is 0.000000. It should be larger than 0.0. Add this to the technology information for better accuracy.

#WARNING (NREX-30) Please also check the height and metal thickness values for the routing layers heigher than routing layer M1

#WARNING (NREX-4) No Extended Cap Table was imported. Not enough process information was provided either and default Extended Cap Table database will be used.

#WARNING (NRAG-41) The M1 user tracks are removed and regenerated from M3

# M1           H   Track-Pitch = 0.200    Line-2-Via Pitch = 0.205

#WARNING (NRAG-44) Track pitch is too small compared with line-2-via pitch 

 So I have two questions,

- How can I make sure the cells are spread a better in all the available area? 

- For the warnings: To fix it, should i set a parameter in the lef file? if so, which one?

Thanks!