Max Tran and max cap violations on tristate nets

Hello experts,

my problem is that optDesign doesn't upsize tristate-buffers during DRV fixing and therefore ends with quite a number of tran time and max cap violations on the nets connected to their outputs (be it preCts, postCts or postRoute).

In the gate-level netlist these nets are connected to three pins:
* output of tristate-buffer
* bidir pin of a full-custom macro (SRAM), with only pin capacitance specified. Driving capability is not specified in the macro's .lib file.
* input of DFF reading the data.

In the .tran  and .cap reports, the nets are marked as 'M' (multiple-fanin) which should be ok for tristate nets...

Setup timing on the nets is clean and has plenty of positive slack.

Available tristate cells are recognized correctly, and calling ecoChangeCell ... -upsize does the trick manually (only in postCts and postRoute; in preCts the command errors out with
"**ERROR: (ENCOPT-630):  No alternate cell with desired driving strength exist in the library"
This is strange, since these cells do exist and are recognized (at least according to the reported number of cells).

I'm working with Encounter 14.13. In a previous revision of the chip which has been done with the 9.11 release, these buffers were upsized correctly (same std cell lib, same macro .lib file, same constraints).

...I'm somewhat stuck and would be happy for any input...

Cheers,

Andreas