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lots of M1 spacing errors despite having low placement density

namepalli

Hi All,

We are seeing lots of M1 spacing erros despite having low placement density -- we bumped it down to even 30% placement density, but we still see lots of M1 spacing violations and ofcourse some shorts too.

We see around 2k M1 violations, 200 M2 violations, and none in M3,M4 and M5 -- my doubt is why it didnt use higher metals to route, and resolve DRCs in M1/M2 when lots of area is available.

Also, would like to input that, at some places, the M1 net is routed so close to the M1 std cell pin, as if the router doesnt see the pins, or doesnt recognize the std cell lef properly.

BTW, we are trying to use this new fab and library for first time in 180nm , so there is a possiblity that the tech.lef or the std cell lef could contain errors too -- plz point me if there is a way to validate them.

Thans a lot for your help .

Thanks,

Raj.

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