for my clock tree synthesis, I use the ccopt flow, and I source the following commands:
setCTSMode -engine ccopt
create_ccopt_clock_tree_spec -file ccopt.spec
The .spec file should be based on my .sdc. However, in the generated .spec file I can read something like the following:
# Clock tree offset inferred from set_clock_latency -source assertions:set_ccopt_property source_latency -delay_corner corner_max_125c -late -rise -clock_tree CK_4 -0.273set_ccopt_property source_latency -delay_corner corner_max_125c -late -fall -clock_tree CK_4 -0.276set_ccopt_property source_latency -delay_corner corner_min_m55c -early -rise -clock_tree CK_4 -0.125set_ccopt_property source_latency -delay_corner corner_min_m55c -early -fall -clock_tree CK_4 -0.126
However I don't have any set_clock_latency command in my .sdc!!!
Where do these numbers come from? And why they're negative?
I hope you can help me understand. Thanks!!!
Can you take carefully a look your sdc if there is a set_input_delay for clock ports. If yes, tool will convert this setting to set_clock_latency for those clock ports.
" why they're negative?"
I hope the below will help you.
set_clock_latency -0.2 CK (-0.2 is pull up clock)
when create_ccopt_clock_tree_spec then It will be
set_ccopt_property insertion_delay 0.2 -pin CK