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Connectivity Violations in Soc Encounter implementation

Mahmoud Dagher

I have implemented my layout in SoC Encounter and when I verify Connectivity, I have 7 violations (antenna violations). I routed certain wires manually in the implementation and mainly these nets have the antenna violations! .. How to fix that? Is this a way to do it by commands? 

[Note: I drew those wires in purpose for my task so I can't delete them and they were fine satisfying the DRC rules and so on].  

  • The "antenna" that verifyConnectiviy complains about is a geometry antenna, meaning a piece of wire sticking out past a target or natural end point. These can pass DRC, as you saw. It is not a process antenna, which would be a DRC violation. You can leave them in your design if you are happy with them.

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