Stats

  • Locked Locked
  • Replies 0
  • Subscribers 91
  • Views 13311
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Problem in reporting set_data_check in Genus 19

dbellix

Hello,

I am experiencing some issues in reporting the outcome of the SDC constraint set_data_check. Briefly, I am trying to constraint the delay between two input pins of a combinational gate, with the classic -from -to syntax. Genus is able to recognize correctly the constraint in the SDC but I cannot get anything useful from the report_timing command, neither specifying directly the path. As specified in the user guide, I am also setting enable_data_check to true before importing the design and timing_disable_non_sequential_checks is set to false.

Do you have any suggestion?

dbellix

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.