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purpose of preCTS stage & latency/skew setting

cyll

Hi,
I have a question about the purpose of the preCTS stage.
preCTS stage is for drv fixing (max cap/tran/fanout..), also for HFNs optimizations.
But why it’s needed to specify estimated clock latency and skew, as after CTS latency and skew value
becomes real and thereafter all the rest of implementation optimizations stages (postCTS, routeOpt,…) will cover the lack of the preCTS work ?.

  • Hi cyll,
    before CTS is done, the clock tree does not exist and the placer does not know how the clock tree implementation will look like. Therefore the clock networks are considered ideal, having zero delay and transition time. This is way too optimistic, therefore it is recommended to define an estimated insertion delay (network latency) and realistic transition times. Giving an accurate input to the placer and preCTS optimization leads to better results and improves the correlation between pre-cts and post-cts timing.

    After CTS is done, the timing engine can time the implemented clock tree and the accurate propagated clock latency is used.

    Dimo

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