Global net connections warning on export netlist with power pins for block implementation

Hi,

I am running a digital implementation using Innovus v18.10-p002_1. It is a digital block with only one supply voltage. The top will be done on Virtuoso (with addition of PADs over there). In other words, my Verilog has no PADs.

The implementation go smoothly, I used a CPF to define the power domain and connect cells to the global nets. But when I try to export the netlist with power pins, I have many warnings like the one below. I checked the design from every possible perspective, and I could not find any mistake. My flow looks correct (I tried multiple alternatives with same result) and the database is consistent (all pins in all instances are connected to the global power nets VDD/VSS). The generated netlist is also correct, as far as my simulation can test. But those warnings are a bit scary.

Are these warnings expected for a block level design without PADs when exporting a netlist with power pins?

Thanks a lot for the support!

@innovus > write_netlist -phys top.v
Writing Netlist "top.v" ...
Pwr name (VDD).
Gnd name (VSS).
1 Pwr names and 1 Gnd names.
**WARN: (IMPVL-531): None of the instances inside cell/module 'MODULE_NAME1...' has power/ground connections, likely because global net connections (from globalNetConnect or CPF) have not been applied to the instances. Make sure this is acceptable, or apply the needed GNCs/CPF to make the required power/ground connections and re-save the netlist.
**WARN: (IMPVL-531): None of the instances inside cell/module 'MODULE_NAME2...' has power/ground connections, likely because global net connections (from globalNetConnect or CPF) have not been applied to the instances. Make sure this is acceptable, or apply the needed GNCs/CPF to make the required power/ground connections and re-save the netlist.

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