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  3. [GENUS] Different synthesis results using 19.11 or 19.1...

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[GENUS] Different synthesis results using 19.11 or 19.14

OscarAC
OscarAC over 3 years ago

Hi all!!

I am using genus to synthesize a digital design using the globalfoundries FDSOI 22 nm tech. I have updated the tool version from 19.11 to 19.14 and, using the same the script for the synthesis, the timing results have worsened. Now we are getting more than 100 ps "extra" negative slack (we had negative slack before but now it is even worst).

I guess it is a matter that some of the "default" values of the genus variables have changed,  my problem is that I don't know how to confirm it. Is there a way to know why the timing results are different? Is there a way to print out all the genus variables (like get_db * > variables.rpt)?

Thanks in advance

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  • OscarAC
    OscarAC over 3 years ago

    Hi again!! let me update with more data

    Checking the log files (find them attached) and comparing them until the end of syn_generic command, we find several differences (even the size of the file):

     

    In version 19.11:

    1. We see several messages like: 
      1. "Info    : Could not find an attribute in the library. [LBR-436]        : Attribute 'max_fanout' on 'output/inout' pin 'Z' of cell 'SC8T_AN2X0P5_CSC20L' is not defined in the library"
      2. "Info    : Via with no resistance will have a value of '0.0' assigned for resistance value. [PHYS-129]       : Via 'VIA01_0_30_20_20_HX_V1' has no resistance value"
    1. We get some warnings like: "Warning : Missing wire parameter. [PHYS-15]        : 'CPERSQDIST' parameter is missing for layer 'QB' [line 1633 in file 22FDSOI_10M_2Mx_5Cx_1Jx_2Qx_LB_104cpp_tech.lef]"
    2. After syn_generic we see several messages like:
      1. Undriven module input port. [ELABUTL-131] 
      2. Unconnected instance input port detected. [ELABUTL-129]
      3. Replacing a flip-flop with a logic constant 0. [GLO-12]
      4. Replacing a blocking flip-flop with a logic constant 0. [GLO-21]
    1. Messages in 3 seem to lead to a large "Sequential Deletion Report", with several "unloaded", "merged" and "constant 0"units.

    In version 19.14:

    1. We do not observe the messages commented in the previous section
    2. We see messages like: "Info    : Detected an unsupported timing arc type. [LBR-72]        : Timing arc 'sigma_late' between libpins 'B' and 'Z' on libcell 'SC8T_AN2X0P5_CSC20L' is ignored. Hold timing analysis and optimization are not supported."
    3. There are more "Sequential clock pins without clock waveform"

    At the end of the syn_generic command, version 19.11 reports a negative slack of -648 ps while version 19.14 reports -738 ps. We would like to ask:

    1.  Is there a way to know why the timing results are different? in other words, Why are we getting different results depending on the genus versions? 
    2. Can we get the same results using genus version 19.14 ?

    Thanks in advance for your help

    genus.zip

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  • OscarAC
    OscarAC over 3 years ago

    Hi again!! let me update with more data

    Checking the log files (find them attached) and comparing them until the end of syn_generic command, we find several differences (even the size of the file):

     

    In version 19.11:

    1. We see several messages like: 
      1. "Info    : Could not find an attribute in the library. [LBR-436]        : Attribute 'max_fanout' on 'output/inout' pin 'Z' of cell 'SC8T_AN2X0P5_CSC20L' is not defined in the library"
      2. "Info    : Via with no resistance will have a value of '0.0' assigned for resistance value. [PHYS-129]       : Via 'VIA01_0_30_20_20_HX_V1' has no resistance value"
    1. We get some warnings like: "Warning : Missing wire parameter. [PHYS-15]        : 'CPERSQDIST' parameter is missing for layer 'QB' [line 1633 in file 22FDSOI_10M_2Mx_5Cx_1Jx_2Qx_LB_104cpp_tech.lef]"
    2. After syn_generic we see several messages like:
      1. Undriven module input port. [ELABUTL-131] 
      2. Unconnected instance input port detected. [ELABUTL-129]
      3. Replacing a flip-flop with a logic constant 0. [GLO-12]
      4. Replacing a blocking flip-flop with a logic constant 0. [GLO-21]
    1. Messages in 3 seem to lead to a large "Sequential Deletion Report", with several "unloaded", "merged" and "constant 0"units.

    In version 19.14:

    1. We do not observe the messages commented in the previous section
    2. We see messages like: "Info    : Detected an unsupported timing arc type. [LBR-72]        : Timing arc 'sigma_late' between libpins 'B' and 'Z' on libcell 'SC8T_AN2X0P5_CSC20L' is ignored. Hold timing analysis and optimization are not supported."
    3. There are more "Sequential clock pins without clock waveform"

    At the end of the syn_generic command, version 19.11 reports a negative slack of -648 ps while version 19.14 reports -738 ps. We would like to ask:

    1.  Is there a way to know why the timing results are different? in other words, Why are we getting different results depending on the genus versions? 
    2. Can we get the same results using genus version 19.14 ?

    Thanks in advance for your help

    genus.zip

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