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  3. route_special VDD VSS not interleaved.

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route_special VDD VSS not interleaved.

Bentley
Bentley over 3 years ago

Hello,

Task: Floor Plan

Issue: Horizontal Power stripes are not interleaved or connected correctly.

Tool Version : Innovus 211

Tool Command: innovus -stylus

I am implementing the floorplan.  The Power Ring and Power stripes look correct, but when I run the route_special command with the intent of connecting the power and ground of the standard cells, the horizontal power rails are only VDD, there are no VSS rails.  The VDD and VSS of the standard cells can be seen, but he VDD route tramples over all VSS connections.

I don't know if I am missing an input file or if I have missed a step or setup option.  Any advice will be greatly appreciated.  The details of the command I ran and the log file output are listed below.

Thank you.
Regards,

Shane

The command I used is:

route_special \

    -connect {block_pin pad_pin pad_ring core_pin floating_stripe} \

    -layer_change_range { M1(1) M5(11) } \

    -block_pin_target {nearest_target} \

    -pad_pin_port_connect {all_port one_geom} \

    -pad_pin_target {nearest_target} \

    -core_pin_target {first_after_row_end} \

    -floating_stripe_target {block_ring pad_ring ring stripe ring_pin block_pin followpin} \

    -allow_jogging 1 \

    -crossover_via_layer_range { M1(1) M5(11) } \

    -nets { VDD VSS } \

    -allow_layer_change 1 \

    -block_pin use_lef \

    -target_via_layer_range { M1(1) M5(11) }

The log file for this command says:

route_special \

    -connect {block_pin pad_pin pad_ring core_pin floating_stripe} \

    -layer_change_range { M1(1) M5(11) } \

    -block_pin_target {nearest_target} \

    -pad_pin_port_connect {all_port one_geom} \

    -pad_pin_target {nearest_target} \

    -core_pin_target {first_after_row_end} \

    -floating_stripe_target {block_ring pad_ring ring stripe ring_pin block_pin followpin} \

    -allow_jogging 1 \

    -crossover_via_layer_range { M1(1) M5(11) } \

    -nets { VDD VSS } \

    -allow_layer_change 1 \

    -block_pin use_lef \

    -target_via_layer_range { M1(1) M5(11) }

#% Begin route_special (date=06/27 15:18:29, mem=1557.2M)

*** Begin SPECIAL ROUTE on Mon Jun 27 15:18:29 2022 ***

SPECIAL ROUTE ran on directory: *****

SPECIAL ROUTE ran on machine: file (*****)

 

Begin option processing ...

srouteConnectPowerBump set to false

routeSelectNet set to "VDD VSS"

routeSpecial set to true

srouteBlockPin set to "useLef"

srouteBottomLayerLimit set to 1

srouteBottomTargetLayerLimit set to 1

srouteConnectConverterPin set to false

srouteCrossoverViaBottomLayer set to 1

srouteCrossoverViaTopLayer set to 11

srouteFloatingStripeTarget set to "blockring padring ring stripe ringpin blockpin followpin"

srouteFollowCorePinEnd set to 3

srouteJogControl set to "preferWithChanges differentLayer"

srouteNoViaOnWireShape set to "padring ring stripe blockring blockpin coverpin blockwire corewire followpin iowire"

sroutePadPinAllPorts set to true

sroutePreserveExistingRoutes set to true

srouteRoutePowerBarPortOnBothDir set to true

srouteStopBlockPin set to "nearestTarget"

srouteTopLayerLimit set to 11

srouteTopTargetLayerLimit set to 11

End option processing: cpu: 0:00:00, real: 0:00:00, peak: 49.00 megs.

 

Reading DB technology information...

Finished reading DB technology information.

Reading floorplan and netlist information...

Finished reading floorplan and netlist information.

**WARN: (IMPSR-4302): Cap-table/qrcTechFile is found in the design, so the same information from the technology file will be ignored.

Read in 23 layers, 11 routing layers, 1 overlap layer

Read in 959 macros, 49 used

Read in 48 components

  48 core components: 48 unplaced, 0 placed, 0 fixed

Read in 2053 physical pins

  2053 physical pins: 0 unplaced, 2053 placed, 0 fixed

Read in 3 logical pins

Read in 2056 nets

Read in 2 special nets, 2 routed

Read in 2149 terminals

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the up vias on single M1 layer. The excess vias will be ignored.

**WARN: (IMPSR-4305): Reached the limit of the 128 candidates for the down vias on single M2 layer. The excess vias will be ignored.

**WARN: (EMS-27):     Message (IMPSR-4305) has exceeded the current message display limit of 20.

To increase the message display limit, refer to the product command reference manual.

2 nets selected.

 

Begin power routing ...

**WARN: (IMPSR-1254): Unable to connect the specified objects, since block pins of the VDD net were not found in the design. Check netlist or change the parameter value to include block pins in the design.

**WARN: (IMPSR-1256): Unable to find any CORE class pad pin of the VDD net due to unavailability of the pin or check netlist in the routing area or layer. Change routing area or layer to include the expected pin or check netlist. Alternatively, change port class in the technology file.

Type 'man IMPSR-1256' for more detail.

Cannot find any AREAIO class pad pin of net VDD. Check net list, or change port class in the technology file, or change option to include pin in given range.

**WARN: (IMPSR-1254): Unable to connect the specified objects, since block pins of the VSS net were not found in the design. Check netlist or change the parameter value to include block pins in the design.

**WARN: (IMPSR-1256): Unable to find any CORE class pad pin of the VSS net due to unavailability of the pin or check netlist in the routing area or layer. Change routing area or layer to include the expected pin or check netlist. Alternatively, change port class in the technology file.

Type 'man IMPSR-1256' for more detail.

Cannot find any AREAIO class pad pin of net VSS. Check net list, or change port class in the technology file, or change option to include pin in given range.

CPU time for VDD FollowPin 0 seconds

CPU time for VSS FollowPin 0 seconds

  Number of IO ports routed: 0

  Number of Block ports routed: 0

  Number of Stripe ports routed: 0

  Number of Core ports routed: 408

  Number of Pad ports routed: 0

  Number of Power Bump ports routed: 0

  Number of Followpin connections: 204

End power routing: cpu: 0:00:01, real: 0:00:02, peak: 50.00 megs.

 

 

 

Begin updating DB with routing results ...

Updating DB with 2053 io pins ...

Updating DB with 0 via definition ...Extracting standard cell pins and blockage ......

Pin and blockage extraction finished

 

route_special created 614 wires.

ViaGen created 2654 vias, deleted 0 via to avoid violation.

+--------+----------------+----------------+

|  Layer |     Created    |     Deleted    |

+--------+----------------+----------------+

|   M1   |       612      |       NA       |

|   V1   |       408      |        0       |

|   M2   |        2       |       NA       |

|   V2   |       408      |        0       |

|   M3   |       408      |        0       |

|   V3   |       408      |        0       |

|   M4   |       408      |        0       |

|   V4   |       408      |        0       |

|   M5   |       206      |        0       |

+--------+----------------+----------------+

#% End route_special (date=06/27 15:18:31, total cpu=0:00:01.4, real=0:00:02.0, peak res=1567.4M, current mem=1567.4M)

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  • Bentley
    Bentley over 3 years ago

    I have solved this issue now.  The solution is to select Floorplan->specify floorplan.  Select the advanced tab and then select "Double-back Rows: " and change it so that the command has "-flip s" added.

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