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Genus Synthesis 15.2 vs 20.1

Azr

Good morning, everyone!

It happened that i use two versions of Genus tool - 15.2 and 20.1 (mostly). The problem is - im sysnthesizing my project by use of .tcl-script and in 20.1 it completed well, but in the 15.2 after syn_map the tool had given me an error about wrong netlist. So it can't done my design properly and i can't use it in Innovus to implement my design eather.

Error is:

IMPVL-387 - illegal bus-bit reference. BLOCK.Name [X] [Y1] to scalar net BLOCK.Name [X]

IMPVL-387 - illegal bus-bit reference. BLOCK.Name [X] [Y2] to scalar net BLOCK.Name [X]

...

IMPVL-387 - illegal bus-bit reference. BLOCK.Name [X] [Yx] to scalar net BLOCK.Name [X]

I tried to find the description of this issue, but never succeeded.

I actualy never use versions under 19 of Cadence IC... Maybe someone of you know this error type and how to fix it (by fixing my script maybe for compatibility with 15.2. I've found that report_module - report module in this version, working on it)

  • Hi,
    from the description of the error, it seems like Genus 15.2 does not like your rtl code having a 2d array in this context.
    I assume Genus 20.1 was enhanced to support this, hence the discrepancy.

    Generally it is ill-advised to use so old tool version. A lot of improvements and bug fixes have happened in 5 years between these tool versions.

    - Dimo

  • in reply to DimoM

    I watched through "mapped" netlists between two versions, in case of 20.1 there is no such code at all...  So it seems like Genus 15.2 firstly synthesise this "bad, unsupported" code, and then get an error on next step, still maybe be bug though...

    In other hand "small" projects, like simple UART, synthesise without this problem through all steps, seems interesting...

    Anyway, thanks

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