I have generated a layout in Innovus. For now, I would like to extract the parasitics of VDD/VSS ring and stripes for analysis.
However, even if I set the extract rc effort level to be high/signoff, there is no parasitics information available in the outcome SPEF.
I am wondering how to generate the information if possible. Also, is there any option for us to generate a full-chip level DSPF file including the P/G grid?
I think Innovus won't extract any RC information on supply nets unless you do a IR drop analysis, which however uses a different extractor tool altogether. AFAIK Innovus only performs RC extraction on signal nets to determine accurate load and therefore signal propagation properties.