• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Digital Implementation
  3. Innovus: DRC Error - Special Wire of Net *** & Blockage...

Stats

  • Locked Locked
  • Replies 5
  • Subscribers 92
  • Views 4510
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Innovus: DRC Error - Special Wire of Net *** & Blockage of Cell ***

Anas2023a95
Anas2023a95 over 2 years ago

Dear all, 

I'm using Innovus to place and route an RTL design synthesised by Genus.

After completing the routing, verify_drc tool highlights DRC errors on metal2 described as the following:

Special Wire of Net VSS & Blockage of Cell C48.

Actual: 0.028  Required: 0.6  Type: ParallelRunLength Spacing

The following are some screenshots from the layout: 

Can someone help me solve this, please? 

Many thanks,

Anas

  • Cancel
  • DimoM
    DimoM over 2 years ago

    It seems that the blockages in the cell C48  ( defined OBS in the def file) are treated as real geometry and gets full DRC checks. 
    Please check the DEF of this macro. You can use the LEF/DEF Language Reference  to help you understand the syntax.

    You can also visualize the blockages in the Innovus gui  by turning on visualization for Cell -> Cell blockage in the control panel on the right.

    - Dimo

     

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Anas2023a95
    Anas2023a95 over 2 years ago in reply to DimoM

    Hi Dimo, 


    Thanks for your continuous help over the past couple of days! 

    I cannot find def files in the pads library. Is that normal? 

    I did not quite get what you mean by:

    DimoM said:
    blockages in the cell C48  ( defined OBS in the def file) are treated as real geometry and gets full DRC checks.

    To my (basic) understanding, blockages have no layout, they are only defined areas that have some restrictions on placement and routing, am I right?

    In the VerifyDRC window, I have enabled the option of "Ignore Cell Blockage", and no violations were reported.

    Can you please explain what is happening and whether I should ignore those violations? 

    Thank you very much!

    Anas

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • DimoM
    DimoM over 2 years ago in reply to Anas2023a95
    Anas2023a95 said:
    To my (basic) understanding, blockages have no layout, they are only defined areas that have some restrictions on placement and routing, am I right?

    Hi,
    it really depends on what the blockages are modelling. If you want to model a real route, then you can consider this obstructions as a real geometry. If you just want to prevent routing in this area, then staying out of the area is enough. In your case it seems the DRC checker does the former.
    You have to check the DEF file, see how the blockage is defined, and understand why is this flagged as violation. When you have an understanding of the situation, you can ignore this violation if you think its not a real one.

    The DEF file is somewhere there, Innovus needs a definition to know how the block looks like. You can select the instance and query the file its definition  comes from with the following command:
    get_db [get_db selected ] .base_cell.lef_file_name

    This will return a filename, which is most probably a link. Follow the link and find the definition of this PAD.

    I recommend checking the LEF/DEF reference guide to understand the different entries.

    Except if you are using the MSOA flow ? Then you will not have def files, but OA database.

    - Dimo

    • Cancel
    • Vote Up +1 Vote Down
    • Cancel
  • Anas2023a95
    Anas2023a95 over 2 years ago in reply to DimoM

    Hi Dimo, 

    Thank you very much for the explanation! 

    The cell is referenced to a .lef file, is that different to a .def file? 

    From the LEF file, this is the definition of the used macro: 

    MACRO PDDW0208CDG
    CLASS PAD ;
    FOREIGN PDDW0208CDG 0.000 0.000 ;
    ORIGIN 0.000 0.000 ;
    SIZE 80.000 BY 120.000 ;
    SYMMETRY X Y R90 ;
    SITE pad ;
    PIN PE
    DIRECTION INPUT ;
    PORT
    LAYER METAL5 ;
    RECT 66.730 119.000 68.730 120.000 ;
    LAYER METAL4 ;
    RECT 66.730 119.000 68.730 120.000 ;
    LAYER METAL3 ;
    RECT 66.730 119.000 68.730 120.000 ;
    LAYER METAL2 ;
    RECT 66.730 119.000 68.730 120.000 ;
    LAYER METAL1 ;
    RECT 66.730 119.000 68.730 120.000 ;
    END
    ANTENNAGATEAREA 5.1450 LAYER METAL1 ;
    ANTENNAPARTIALMETALSIDEAREA 26.5212 LAYER METAL1 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA12 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL2 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL2 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA23 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL3 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL3 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA34 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL4 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL4 ;
    ANTENNAPARTIALCUTAREA 0.3888 LAYER VIA45 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL5 ;
    ANTENNAPARTIALMETALSIDEAREA 14.0400 LAYER METAL5 ;
    END PE
    PIN PAD
    DIRECTION INOUT ;
    PORT
    LAYER METAL5 ;
    RECT 4.900 0.000 75.100 4.870 ;
    LAYER METAL4 ;
    RECT 4.900 0.000 75.100 4.870 ;
    LAYER METAL3 ;
    RECT 4.900 0.000 75.100 4.870 ;
    LAYER METAL2 ;
    RECT 4.900 0.000 75.100 4.870 ;
    END
    ANTENNAGATEAREA 14.4000 LAYER METAL2 ;
    ANTENNADIFFAREA 1914.0232 LAYER METAL2 ;
    ANTENNAPARTIALMETALSIDEAREA 823.5882 LAYER METAL2 ;
    ANTENNAPARTIALCUTAREA 39.7488 LAYER VIA23 ;
    ANTENNAGATEAREA 14.4000 LAYER METAL3 ;
    ANTENNADIFFAREA 1914.0232 LAYER METAL3 ;
    ANTENNAPARTIALMETALSIDEAREA 79.5742 LAYER METAL3 ;
    ANTENNAPARTIALCUTAREA 72.4672 LAYER VIA34 ;
    ANTENNAGATEAREA 14.4000 LAYER METAL4 ;
    ANTENNADIFFAREA 1914.0232 LAYER METAL4 ;
    ANTENNAPARTIALMETALSIDEAREA 79.5742 LAYER METAL4 ;
    ANTENNAPARTIALCUTAREA 34.7328 LAYER VIA45 ;
    ANTENNAGATEAREA 14.4000 LAYER METAL5 ;
    ANTENNADIFFAREA 1914.0232 LAYER METAL5 ;
    ANTENNAPARTIALMETALSIDEAREA 351.3276 LAYER METAL5 ;
    END PAD
    PIN OEN
    DIRECTION INPUT ;
    PORT
    LAYER METAL5 ;
    RECT 4.640 119.000 6.640 120.000 ;
    LAYER METAL4 ;
    RECT 4.640 119.000 6.640 120.000 ;
    LAYER METAL3 ;
    RECT 4.640 119.000 6.640 120.000 ;
    LAYER METAL2 ;
    RECT 4.640 119.000 6.640 120.000 ;
    LAYER METAL1 ;
    RECT 4.640 119.000 6.640 120.000 ;
    END
    ANTENNAGATEAREA 5.1450 LAYER METAL1 ;
    ANTENNAPARTIALMETALSIDEAREA 26.5212 LAYER METAL1 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA12 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL2 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL2 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA23 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL3 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL3 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA34 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL4 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL4 ;
    ANTENNAPARTIALCUTAREA 0.3888 LAYER VIA45 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL5 ;
    ANTENNAPARTIALMETALSIDEAREA 14.0400 LAYER METAL5 ;
    END OEN
    PIN IE
    DIRECTION INPUT ;
    PORT
    LAYER METAL5 ;
    RECT 43.780 119.000 45.780 120.000 ;
    LAYER METAL4 ;
    RECT 43.780 119.000 45.780 120.000 ;
    LAYER METAL3 ;
    RECT 43.780 119.000 45.780 120.000 ;
    LAYER METAL2 ;
    RECT 43.780 119.000 45.780 120.000 ;
    LAYER METAL1 ;
    RECT 43.780 119.000 45.780 120.000 ;
    END
    ANTENNAGATEAREA 5.1450 LAYER METAL1 ;
    ANTENNAPARTIALMETALSIDEAREA 26.5212 LAYER METAL1 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA12 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL2 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL2 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA23 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL3 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL3 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA34 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL4 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL4 ;
    ANTENNAPARTIALCUTAREA 0.3888 LAYER VIA45 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL5 ;
    ANTENNAPARTIALMETALSIDEAREA 14.0400 LAYER METAL5 ;
    END IE
    PIN I
    DIRECTION INPUT ;
    PORT
    LAYER METAL5 ;
    RECT 25.740 119.000 27.740 120.000 ;
    LAYER METAL4 ;
    RECT 25.740 119.000 27.740 120.000 ;
    LAYER METAL3 ;
    RECT 25.740 119.000 27.740 120.000 ;
    LAYER METAL2 ;
    RECT 25.740 119.000 27.740 120.000 ;
    LAYER METAL1 ;
    RECT 25.740 119.000 27.740 120.000 ;
    END
    ANTENNAGATEAREA 5.1450 LAYER METAL1 ;
    ANTENNAPARTIALMETALSIDEAREA 26.5212 LAYER METAL1 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA12 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL2 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL2 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA23 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL3 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL3 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA34 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL4 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL4 ;
    ANTENNAPARTIALCUTAREA 0.3888 LAYER VIA45 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL5 ;
    ANTENNAPARTIALMETALSIDEAREA 14.0400 LAYER METAL5 ;
    END I
    PIN DS
    DIRECTION INPUT ;
    PORT
    LAYER METAL5 ;
    RECT 39.610 119.000 41.610 120.000 ;
    LAYER METAL4 ;
    RECT 39.610 119.000 41.610 120.000 ;
    LAYER METAL3 ;
    RECT 39.610 119.000 41.610 120.000 ;
    LAYER METAL2 ;
    RECT 39.610 119.000 41.610 120.000 ;
    LAYER METAL1 ;
    RECT 39.610 119.000 41.610 120.000 ;
    END
    ANTENNAGATEAREA 5.1450 LAYER METAL1 ;
    ANTENNAPARTIALMETALSIDEAREA 26.5212 LAYER METAL1 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA12 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL2 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL2 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA23 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL3 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL3 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA34 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL4 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL4 ;
    ANTENNAPARTIALCUTAREA 0.3888 LAYER VIA45 ;
    ANTENNAGATEAREA 5.1450 LAYER METAL5 ;
    ANTENNAPARTIALMETALSIDEAREA 14.0400 LAYER METAL5 ;
    END DS
    PIN C
    DIRECTION OUTPUT ;
    PORT
    LAYER METAL5 ;
    RECT 55.395 119.000 57.395 120.000 ;
    LAYER METAL4 ;
    RECT 55.395 119.000 57.395 120.000 ;
    LAYER METAL3 ;
    RECT 55.395 119.000 57.395 120.000 ;
    LAYER METAL2 ;
    RECT 55.395 119.000 57.395 120.000 ;
    LAYER METAL1 ;
    RECT 55.395 119.000 57.395 120.000 ;
    END
    ANTENNADIFFAREA 5.2700 LAYER METAL1 ;
    ANTENNAPARTIALMETALSIDEAREA 17.3734 LAYER METAL1 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA12 ;
    ANTENNADIFFAREA 5.2700 LAYER METAL2 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL2 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA23 ;
    ANTENNADIFFAREA 5.2700 LAYER METAL3 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL3 ;
    ANTENNAPARTIALCUTAREA 0.2028 LAYER VIA34 ;
    ANTENNADIFFAREA 5.2700 LAYER METAL4 ;
    ANTENNAPARTIALMETALSIDEAREA 3.1800 LAYER METAL4 ;
    ANTENNAPARTIALCUTAREA 0.3888 LAYER VIA45 ;
    ANTENNADIFFAREA 5.2700 LAYER METAL5 ;
    ANTENNAPARTIALMETALSIDEAREA 14.0400 LAYER METAL5 ;
    END C
    OBS
    LAYER METAL1 ;
    RECT 68.960 0.000 80.000 120.000 ;
    RECT 66.500 0.000 68.960 118.770 ;
    RECT 57.625 0.000 66.500 120.000 ;
    RECT 55.165 0.000 57.625 118.770 ;
    RECT 46.010 0.000 55.165 120.000 ;
    RECT 43.550 0.000 46.010 118.770 ;
    RECT 41.840 0.000 43.550 120.000 ;
    RECT 39.380 0.000 41.840 118.770 ;
    RECT 27.970 0.000 39.380 120.000 ;
    RECT 25.510 0.000 27.970 118.770 ;
    RECT 6.870 0.000 25.510 120.000 ;
    RECT 4.410 0.000 6.870 118.770 ;
    RECT 0.000 0.000 4.410 120.000 ;
    LAYER VIA12 ;
    RECT 66.730 119.000 68.730 120.000 ;
    RECT 55.395 119.000 57.395 120.000 ;
    RECT 43.780 119.000 45.780 120.000 ;
    RECT 39.610 119.000 41.610 120.000 ;
    RECT 25.740 119.000 27.740 120.000 ;
    RECT 4.640 119.000 6.640 120.000 ;
    LAYER METAL2 ;
    RECT 75.380 0.000 80.000 120.000 ;
    RECT 69.010 5.150 75.380 120.000 ;
    RECT 66.450 5.150 69.010 118.720 ;
    RECT 57.675 5.150 66.450 120.000 ;
    RECT 55.115 5.150 57.675 118.720 ;
    RECT 46.060 5.150 55.115 120.000 ;
    RECT 43.500 5.150 46.060 118.720 ;
    RECT 41.890 5.150 43.500 120.000 ;
    RECT 39.330 5.150 41.890 118.720 ;
    RECT 28.020 5.150 39.330 120.000 ;
    RECT 25.460 5.150 28.020 118.720 ;
    RECT 6.920 5.150 25.460 120.000 ;
    RECT 4.620 5.150 6.920 118.720 ;
    RECT 4.360 0.000 4.620 118.720 ;
    RECT 0.000 0.000 4.360 120.000 ;
    LAYER VIA23 ;
    RECT 4.900 0.000 75.100 4.870 ;
    RECT 66.730 119.000 68.730 120.000 ;
    RECT 55.395 119.000 57.395 120.000 ;
    RECT 43.780 119.000 45.780 120.000 ;
    RECT 39.610 119.000 41.610 120.000 ;
    RECT 25.740 119.000 27.740 120.000 ;
    RECT 4.640 119.000 6.640 120.000 ;
    LAYER METAL3 ;
    RECT 75.380 0.000 80.000 120.000 ;
    RECT 69.010 5.150 75.380 120.000 ;
    RECT 66.450 5.150 69.010 118.720 ;
    RECT 57.675 5.150 66.450 120.000 ;
    RECT 55.115 5.150 57.675 118.720 ;
    RECT 46.060 5.150 55.115 120.000 ;
    RECT 43.500 5.150 46.060 118.720 ;
    RECT 41.890 5.150 43.500 120.000 ;
    RECT 39.330 5.150 41.890 118.720 ;
    RECT 28.020 5.150 39.330 120.000 ;
    RECT 25.460 5.150 28.020 118.720 ;
    RECT 6.920 5.150 25.460 120.000 ;
    RECT 4.620 5.150 6.920 118.720 ;
    RECT 4.360 0.000 4.620 118.720 ;
    RECT 0.000 0.000 4.360 120.000 ;
    LAYER VIA34 ;
    RECT 4.900 0.000 75.100 4.870 ;
    RECT 66.730 119.000 68.730 120.000 ;
    RECT 55.395 119.000 57.395 120.000 ;
    RECT 43.780 119.000 45.780 120.000 ;
    RECT 39.610 119.000 41.610 120.000 ;
    RECT 25.740 119.000 27.740 120.000 ;
    RECT 4.640 119.000 6.640 120.000 ;
    LAYER METAL4 ;
    RECT 75.380 0.000 80.000 120.000 ;
    RECT 69.010 5.150 75.380 120.000 ;
    RECT 66.450 5.150 69.010 118.720 ;
    RECT 57.675 5.150 66.450 120.000 ;
    RECT 55.115 5.150 57.675 118.720 ;
    RECT 46.060 5.150 55.115 120.000 ;
    RECT 43.500 5.150 46.060 118.720 ;
    RECT 41.890 5.150 43.500 120.000 ;
    RECT 39.330 5.150 41.890 118.720 ;
    RECT 28.020 5.150 39.330 120.000 ;
    RECT 25.460 5.150 28.020 118.720 ;
    RECT 6.920 5.150 25.460 120.000 ;
    RECT 4.620 5.150 6.920 118.720 ;
    RECT 4.360 0.000 4.620 118.720 ;
    RECT 0.000 0.000 4.360 120.000 ;
    LAYER VIA45 ;
    RECT 4.900 0.000 75.100 4.870 ;
    RECT 66.730 119.000 68.730 120.000 ;
    RECT 55.395 119.000 57.395 120.000 ;
    RECT 43.780 119.000 45.780 120.000 ;
    RECT 39.610 119.000 41.610 120.000 ;
    RECT 25.740 119.000 27.740 120.000 ;
    RECT 4.640 119.000 6.640 120.000 ;
    LAYER METAL5 ;
    RECT 75.560 0.000 80.000 120.000 ;
    RECT 69.190 5.330 75.560 120.000 ;
    RECT 66.270 5.330 69.190 118.540 ;
    RECT 57.855 5.330 66.270 120.000 ;
    RECT 54.935 5.330 57.855 118.540 ;
    RECT 46.240 5.330 54.935 120.000 ;
    RECT 43.320 5.330 46.240 118.540 ;
    RECT 42.070 5.330 43.320 120.000 ;
    RECT 39.150 5.330 42.070 118.540 ;
    RECT 28.200 5.330 39.150 120.000 ;
    RECT 25.280 5.330 28.200 118.540 ;
    RECT 7.100 5.330 25.280 120.000 ;
    RECT 4.440 5.330 7.100 118.540 ;
    RECT 4.180 0.000 4.440 118.540 ;
    RECT 0.000 0.000 4.180 120.000 ;
    END
    END PDDW0208CDG

    I think you are referring to the red text for the blockage, right? 

    From the way blockage is defined, could violations be ignored? Or this has to be assessed differently? 

    Kind regards,

    Anas

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • DimoM
    DimoM over 2 years ago in reply to Anas2023a95

    Yes, I meant the LEF file.
    Looking at the definitions of the pin shapes and the blockages, the spacing violation is bound to happen.

    PIN OEN
    LAYER METAL2 ;
    RECT 25.740 119.000 27.740 120.000 ;

    OBS
    LAYER METAL2 ;
    RECT 25.460 5.150 28.020 118.720 ;

    There is your spacing of 0.28 being reported. I would say you can waive this one.

    Try to run with the flag Use min spacing OBS = true

    • Cancel
    • Vote Up +1 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information