Instance grid not aligned to core sites due to automatic changes on the floorplan made by Innovus

Dear community

When I load my floorplan (as .def file) into Innovus 21.10, I get the following message in the log:

floor plan core box changed from {{160.160000,160.160000},{3393.040000,3822.000000}} to {{31.560000,31.550000},{3519.400000,3951.920000}}

This changes the distance from the core to the IO boundary. As a result, the core box is no longer an integer multiple of the pitch size away from the origin, resulting in an instance grid that is not aligned to the core sites. See pictures below:

Why does that happen and how to prevent it?

Some additional information:

1. The core box is not explicitly defined in our DEF File. All it does is defining the die area and the rows of the standard cells and I/O pads. Here is an excert from the .def file (only the relevant part):

VERSION 5.7 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;

UNITS DISTANCE MICRONS 1000 ;
PROPERTYDEFINITIONS
  DESIGN CatenaDesignType STRING "asic" ;
  DESIGN lastSavedExtractCounter INTEGER 178670 ;
END PROPERTYDEFINITIONS

DIEAREA ( 3553000 2468000 ) ( 3236000 2468000 ) ( 3236000 3982000 ) ( 3087000 3982000 ) ( 3087000 3177000 ) ( 2457000 3177000 ) ( 2457000 3832000 ) ( 2115000 3832000 ) ( 2115000 3982000 ) ( 2011000 3982000 ) ( 2011000 3832000 ) ( 1198000 3832000 ) ( 1198000 3982000 ) ( 1068000 3982000 ) ( 1068000 2015170 ) ( 334160 2015170 ) ( 334160 1619970 ) ( 1068000 1619970 ) ( 1068000 598120 ) ( 382000 598120 ) ( 382000 305000 ) ( 0 305000 ) ( 0 0 ) ( 3553000 0 ) ;
ROW Row_0_1 io_site_F3V 3393000 160000 W DO 1 BY 2308 STEP 0 1000 ;
ROW Row_0_1_2 io_site_F3V 0 0 N DO 3393 BY 1 STEP 1000 0 ;
ROW ROW_3 core_hdll 35840 208320 N DO 5704 BY 1 STEP 560 0 ;
ROW ROW_4 core_hdll 35840 212800 FS DO 5704 BY 1 STEP 560 0 ;
ROW ROW_5 core_hdll 35840 217280 N DO 5704 BY 1 STEP 560 0 ;
ROW ROW_6 core_hdll 35840 221760 FS DO 5704 BY 1 STEP 560 0 ;
[...]

2. Using something like changeFloorplan -coreToBottom 30 completely screws up the floorplan and makes it unusable.

3. Exporting the floorplan after making some changes to the core box adds the following information to the .def file:

PROPERTYDEFINITIONS
    DESIGN lastSavedExtractCounter INTEGER 178670 ;
    DESIGN CatenaDesignType STRING "asic" ;
    COMPONENTPIN designRuleWidth REAL ;
    DESIGN FE_CORE_BOX_LL_X REAL 31.5600 ;
    DESIGN FE_CORE_BOX_UR_X REAL 3519.4000 ;
    DESIGN FE_CORE_BOX_LL_Y REAL 31.5500 ;
    DESIGN FE_CORE_BOX_UR_Y REAL 3951.9200 ;
END PROPERTYDEFINITIONS

Copy-pasting these FE_CORE_BOX_* lines into my own floorplan and changing the numbers to the correct values also results in an unusable floorplan that is screwed up.