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  3. clock gating coverage and asserted

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clock gating coverage and asserted

anyoumus
anyoumus over 1 year ago

Dear Friends,

Please help me to understand the difference between Asserted in low power and clock gating coverage.

1. Please suggested me basic command that we used in low power genus synthesis for each and everystage  .

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  • Mach Brown
    Mach Brown over 1 year ago

    Hello,

    The basic difference between  Asserted in low power and clock gating coverage is mentioned below:

    Asserted in Low Power: typically refers to signals or conditions in a design that are essential for low power modes or operations. In low power designs, certain signals need to be asserted (either high or low) to indicate that the system is in a low power state. Verifying "asserted in low power" involves checking that these signals are correctly asserted during the low power modes of the design.

    Where as Clock gating coverage is a power optimization technique where the clock to specific registers or logic elements is disabled when it's not needed. Clock gating coverage measures the effectiveness of the clock gating strategy. It indicates the percentage of time that the clock is gated (disabled) versus the total time, highlighting how much power is saved through clock gating. Higher clock gating coverage suggests more effective power savings.

    I hope now its clear to you,  What is the difference between these both terms.

    Now you have another query related to basic command use in Low Power Genus Synthesis:

    So, In the context of the Genus synthesis tool, which is part of the Cadence digital implementation toolchain, here are some basic commands used in low power synthesis:

    1. Define Power Modes:create_power_state -name <state_name> -definition <state_definition_file>
    2. Set Power Modes:set_attribute <cell_instance> -power_state <state_name>
    3. Specify Retention Cells:set_attribute <cell_instance> -is_retention
    4. Insert Gating Cells:set_attribute <cell_instance> -is_gated_clock
    5. Set Up Power Domain:set_attribute <cell_instance> -power_domain <domain_name>
    6. Power Aware Synthesis:set_attribute library <library_name> -power_aware_synthesis true
    7. Generate Power-Aware Reports:report_power

    These are basic commands, and the actual usage may vary based on your specific low power requirements, design constraints, and libraries. Consult the Genus synthesis tool documentation and user guides for comprehensive details and customization based on your design specifics.

    Regards

    Mach Brown

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  • anyoumus
    anyoumus over 1 year ago in reply to Mach Brown

    Thanks Mach brown

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  • anyoumus
    anyoumus over 1 year ago in reply to anyoumus

    could you help me in this context

    what is common report we will see genus in low power synthesis flow in every stage .

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  • anyoumus
    anyoumus over 1 year ago in reply to anyoumus

    could you help me in this context

    what is common report we will see genus in low power synthesis flow in every stage .

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  • Raylan Vance
    Raylan Vance over 1 year ago in reply to anyoumus

    Power reports often provide detailed information about the amount of power used or consumed during synthesis and design, especially during low power periods. Parameters can include average power consumption, maximum power consumption, and analysis of power consumption sources at an aggregate level. It helps design at different stages to ensure that power consumption is controlled and optimized during the low power design process.

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  • anyoumus
    anyoumus over 1 year ago in reply to Raylan Vance

    Thanks Raylan.

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