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Community Digital Implementation How to define the pin locations for 2-dimensional input...

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How to define the pin locations for 2-dimensional input?

Doronzzz
Doronzzz 6 months ago

I have a 2-dimensional input in my design - input [2:0] data_in [15:0]. After synthesis with genus, I got a netlist where the inputs are like \data[15], \data[14],...,\data[0]. And furthermore it has definitions like input [2:0] \data[15], .... So how can I define the pin locations of each of the bits for this input? Can I define \data[15]'s inner bits like \data[15][0]? Is it possible to define this with def files?

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  • DimoM
    DimoM 6 months ago

    Hi,
    you can open Innovus, load the design and create a dummy floorplan do dump a test DEF file. I just ran a similar experiment at my end:
    // setting up init_verilog etc ...
    ...
    init_design
    floorplan -d "500 500 0 0 0 0"
    assignIoPins  // Automatic placement of pins
    defOut test.def

    Now in the output def file you can see the proper format, which is like this:
    - reg_o\[0\][3] + NET reg_o\[0\][3] + DIRECTION OUTPUT + USE SIGNAL ...

    That being said, I would suggest to flatten the 2D array, as some other tools down the implementation chain might not support 2D arrays properly. One prominent example is Virtuoso Schematic Editor, in case you do analog on top implementation.

    - Dimo

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