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Digital Implementation

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  • Discussion

    hInst in cadence encounter???

    Category: Digital Implementation

    By ajay01

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    updated over 12 years ago by ajay01

    4 replies • 15920 views
  • Discussion

    Segmentation Fault during Cap table generation

    Category: Digital Implementation

    By Arslan

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    •

    updated over 12 years ago by Kari

    1 replies • 13210 views
  • Discussion

    How to fix via power spacing violations in encounter

    Category: Digital Implementation

    By pandamaneni

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    •

    updated over 12 years ago by Kari

    1 replies • 13169 views
  • Discussion

    reportFanoutviolations -noGlobalnet reports the fanout violations in clock gate cells and PLL outputs

    Category: Digital Implementation

    By gops

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    •

    updated over 12 years ago by Kari

    1 replies • 817 views
  • Discussion

    Does encounter optmizes ideal net when optdesign command is given.

    Category: Digital Implementation

    By gops

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    updated over 12 years ago by Kari

    1 replies • 13169 views
  • Discussion

    how encounter handles max_skew value during CTS

    Category: Digital Implementation

    By gops

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    •

    updated over 12 years ago by Kari

    1 replies • 13126 views
  • Discussion

    Block level lib and lef

    Category: Digital Implementation

    By archive

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    •

    updated over 12 years ago by Kari

    2 replies • 13734 views
  • Discussion

    Flip Chip Routing Problems in Encounter

    Category: Digital Implementation

    By lcaley

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    updated over 12 years ago by Kari

    1 replies • 13678 views
  • Discussion

    checkRoute

    Category: Digital Implementation

    By ArvindBezawada

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    updated over 12 years ago by Kari

    3 replies • 13628 views
  • Discussion

    IR-Drop Analysis

    Category: Digital Implementation

    By archive

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    •

    updated over 12 years ago by Kari

    1 replies • 16045 views
  • Discussion

    dbTermLogicValue?

    Category: Digital Implementation

    By Robin C

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    •

    updated over 12 years ago by Kari

    1 replies • 12951 views
  • Discussion

    Connect macro power to top level

    Category: Digital Implementation

    By ErezBS

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    •

    updated over 12 years ago by Kari

    1 replies • 13277 views
  • Discussion

    Hierarchical flow - power grid

    Category: Digital Implementation

    By ErezBS

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    •

    updated over 12 years ago by Kari

    1 replies • 761 views
  • Discussion

    Difference between checkDrc and verify geometry in EDI

    Category: Digital Implementation

    By guttapalli

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    •

    updated over 12 years ago by Kari

    1 replies • 14185 views
  • Discussion

    Regarding skew from clock Report

    Category: Digital Implementation

    By Ganga111AtFPS

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    •

    updated over 12 years ago by Kari

    1 replies • 13629 views
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