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  3. regarding e and sv

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regarding e and sv

Kamal
Kamal over 17 years ago
I need to do mixed language verification with URM ( e and SV ). In IPCM6.2 mrm manual explaining about e(eVC) over System verilog with xbus example. But, i need for System verillog over e(eVC) their is no description like how to create API wrapper or simple examples. I hope somebody come across wtih this!! please guide me.. Thanks in advance. Regards, kamal
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  • ZeevK
    ZeevK over 17 years ago

    Hello Kamal,

    For the time being, I'd recommend you use existing, established e/SV communication utilities including method ports, event ports and simple ports to communicate with your eVC from SV. For example, you can create a e layer on top of your eVC that defines method ports allowing your SV code to -

    • invoke e sequences
    • get transaction information collected by the monitor

    Similarly, you can use event ports for synchronization and communicating status from the eVC to the SV layer.

    A more automated approach, creating a SV wrapper around your eVC is coming soon. Please contact your Cadence AE for more details...

    Regards,

         Zeev. 

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  • ZeevK
    ZeevK over 17 years ago

    Hello Kamal,

    For the time being, I'd recommend you use existing, established e/SV communication utilities including method ports, event ports and simple ports to communicate with your eVC from SV. For example, you can create a e layer on top of your eVC that defines method ports allowing your SV code to -

    • invoke e sequences
    • get transaction information collected by the monitor

    Similarly, you can use event ports for synchronization and communicating status from the eVC to the SV layer.

    A more automated approach, creating a SV wrapper around your eVC is coming soon. Please contact your Cadence AE for more details...

    Regards,

         Zeev. 

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