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  3. How to mirror VHDL signal in verilog Top Test bench

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How to mirror VHDL signal in verilog Top Test bench

Sowmya Reddy
Sowmya Reddy over 17 years ago

Hi I am writing a test bench to test VHDL design For which I need to access few signals in the design hierarchy How to mirror them, I used nc_mirror, but got errors. Help me Thanking Venkat Reddy Uppala

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  • Sowmya Reddy
    Sowmya Reddy over 17 years ago
    Hi

    Thank you  for your response

    Briefly I will explain my problem

    1) My design is in VHDL

    2) My test bench is in verilog.

    3) In my testbench, after writing few registers in my design

    4) I have to check whether a particular pin of a module deep in hierarchy is set (or ) not

    How I did

    nc_mirror("ba8p_ready", "pali_digit_inst:pali_inst:HS_P_TESTSITE_C:ba8p:hc:hssprtready", "");

    pali_digit_inst  is instantiation of a verilog file and from pali_inst the design starts which is in VHDL.

    I am getting the following error while elaborating

    ncelab: *E,CUVMUR: instance 'pali_epp_test' of design unit 'nc_mirror' is unresolved in 'work.pali_epp_test:module'.

    I have read ncvlog version 5.5 june 2005

    I also have read ncvhdl version 5.5 june 2005

    But could not resolve

    I also tried

    assign ba8p_ready = pali_digit_inst:pali_inst:HS_P_TESTSITE_C:ba8p:hc:hssprtready;

    But it is giving compilation errors.

    Could you please help me resolve this
    Regards
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  • Sowmya Reddy
    Sowmya Reddy over 17 years ago
    Hi

    Thank you  for your response

    Briefly I will explain my problem

    1) My design is in VHDL

    2) My test bench is in verilog.

    3) In my testbench, after writing few registers in my design

    4) I have to check whether a particular pin of a module deep in hierarchy is set (or ) not

    How I did

    nc_mirror("ba8p_ready", "pali_digit_inst:pali_inst:HS_P_TESTSITE_C:ba8p:hc:hssprtready", "");

    pali_digit_inst  is instantiation of a verilog file and from pali_inst the design starts which is in VHDL.

    I am getting the following error while elaborating

    ncelab: *E,CUVMUR: instance 'pali_epp_test' of design unit 'nc_mirror' is unresolved in 'work.pali_epp_test:module'.

    I have read ncvlog version 5.5 june 2005

    I also have read ncvhdl version 5.5 june 2005

    But could not resolve

    I also tried

    assign ba8p_ready = pali_digit_inst:pali_inst:HS_P_TESTSITE_C:ba8p:hc:hssprtready;

    But it is giving compilation errors.

    Could you please help me resolve this
    Regards
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