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How to mirror VHDL signal in verilog Top Test bench

Sowmya Reddy

Hi I am writing a test bench to test VHDL design For which I need to access few signals in the design hierarchy How to mirror them, I used nc_mirror, but got errors. Help me Thanking Venkat Reddy Uppala

Parents

  •  A couple of clarifications:

    1. I assume you meant "$nc_mirror" instead of "nc_mirror" since "nc_mirror" is a VHDL command
    2. I assume "pali_digit_inst" is instantiated from the testbench and the testbench is "pali_epp_test"

     If those two assumptions are correct, then try using full pathnames for the $nc_mirror command:

    •  $nc_mirror("pali_epp_test.ba8p_ready", "pali_epp_test.pali_digit_inst:pali_inst:HS_P_TESTSITE_C:ba8p:hc:hssprtready", "");

    Here is the help message for your error in case it might provide more insight:

    % nchelp ncelab cuvmur
    ncelab/cuvmur =
            An instance of a unit could not be resolved in the libraries,
            where unit is defined in Verilog to be either a module,
            macromodule, primitive, interface or program block or a config.
            In VHDL a unit would be either an entity or a configuration.
            It is also possible that a 5.X configuration view could not be
            resolved in the libraries.
            The error could arise because the Verilog/VHDL unit or the
            5.X configuration view being instantiated in the Verilog
            module needs to be built. A rebuild is needed if a new
            version of the software was installed after the last build.
            Another reason for the problem could be an incorrect or missing
            library name, in which case it could be resolved by supplying
            the correct library name.

    Tim

Reply

  •  A couple of clarifications:

    1. I assume you meant "$nc_mirror" instead of "nc_mirror" since "nc_mirror" is a VHDL command
    2. I assume "pali_digit_inst" is instantiated from the testbench and the testbench is "pali_epp_test"

     If those two assumptions are correct, then try using full pathnames for the $nc_mirror command:

    •  $nc_mirror("pali_epp_test.ba8p_ready", "pali_epp_test.pali_digit_inst:pali_inst:HS_P_TESTSITE_C:ba8p:hc:hssprtready", "");

    Here is the help message for your error in case it might provide more insight:

    % nchelp ncelab cuvmur
    ncelab/cuvmur =
            An instance of a unit could not be resolved in the libraries,
            where unit is defined in Verilog to be either a module,
            macromodule, primitive, interface or program block or a config.
            In VHDL a unit would be either an entity or a configuration.
            It is also possible that a 5.X configuration view could not be
            resolved in the libraries.
            The error could arise because the Verilog/VHDL unit or the
            5.X configuration view being instantiated in the Verilog
            module needs to be built. A rebuild is needed if a new
            version of the software was installed after the last build.
            Another reason for the problem could be an incorrect or missing
            library name, in which case it could be resolved by supplying
            the correct library name.

    Tim

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