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CDC (Clock Domain Crosssing)

kunal1514 over 16 years ago

Hi All,

Can any body provide document related to Clock Domain Crossing and It's verification.

My Querries are

1) How to pass signal from Fast Clock Domain to Slow Clock Domain?

2) How to pass signal from Slow Clock Domain to Fast Clock Domain?

3) What are the challanges during Clock Domain Crossing (CDC).

4) How we can cure these chanllanges.

Regards

Kunal Mishra

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ceesam over 16 years ago

Please try here
http://www.verilab.com/resources/papers-and-presentations/#Pragmatic+Simulation-Based+Verification+of+Clock+Domain+Crossing+Signals+and+Jitter+Using+SystemVerilog+Assertions
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ceesam over 16 years ago

Please try here
http://www.verilab.com/resources/papers-and-presentations/#Pragmatic+Simulation-Based+Verification+of+Clock+Domain+Crossing+Signals+and+Jitter+Using+SystemVerilog+Assertions
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