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Coverage of sequences in class based SystemVerilog(OVM) environments

FrankE

Hello,

I need to collect coverage information about command-sequences generated in the OVM-environment on TLM-level. Unfortunately IUS doesn't allow the usage of SVA-properties inside SV-classes and also doesn't support the repetition-operator => inside covergroup. So I have no idea, how to record coverage information for sequences.

Any ideas how to solve the issue without implementing modules for coverage and without putting the coverage-calls into the DUT ?

regards, Frank

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