Some fundamental questions

Hi,

    I am not new to this board its just that I was hibernating and now I have a new screen name !! Well I had some very fundamental questions ,t would be great if you could answer them or send me pointers to relevant articles.

1. Why does the output of a system oscillate and then settle down gradually in the metastable state?
2. What is basically responsible for metastability ? I know about set up and hold time ,but what is the internal logic that gets disturbed by these violations (it would be great if I can get some inputs at the transistor level)
3. Why is it that the probability of metastability reduces as the number of flip-flops connected in series increases.Is it related to the propagation delay of a flip-flop?
4. How do we calculate the set up and hold time of a a given flop?
5. What are metastability hardened flip-flops made up of? I mean how are they different from the non-hardened ones?
6. What is endurance ? why is it specified in clock cyles in reference to a specific temperature?
7. Why are digital circuits that are working at different clocks more vulnerable to electric noise than circuits working at the same clock?
8. What are the techniques to combat metastability incase a real time signal feeds the flop?

Thanks in advance,

Pooja