Support to transition coverage

Hi Akshay.

I assume you mean SystemVerilog transition bins coverage, not FSM transition coverage (which has been supported for years)...

This is definitely supported in 8.2. For future reference, if you want to see the docs and "What's New" list for a product without having to install it, you can find all the Cadence product docs on SourceLink. For your convenience, I've pasted the link to the IUS 8.2 new features here: http://sourcelink.cadence.com/docs/files/Release_Info/Docs/WhatsNew/WhatsNew8.2/IUS82_Release.html

You can find these docs by logging into http://sourcelink.cadence.com/, then from the home page choose "Functional Verification" from the list of "Platform-specific Information" on the left side of the screen. The next screen will then give you a list of links, choose "Product Documentation", which takes you to a page with all the functional verification tools docs.

Again, for convenience, I've posted here a link to the full IUS 8.2 docs: http://sourcelink.cadence.com/docs/files/Release_Info/Docs/landing/ius82/library.html

Hope this helps.
Steve.