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regarding PSL

onkarkk

Hi,

I want to learn PSL , could any one suggest me how to start with verilog i.e., I want to write code in verilog and assertions in PSL. Please educate me what is the infrastructure needed i.e., tools , operating system. (i have linux (RHEL3) ) . If any one gives a small example then it would be much more helpfull to start.

Thanks in advance.

regards,

Krishna Kishore

  • Hi Krishna.

    You can run PSL properties in simulation using IUS (ncsim), or you can formally prove them against your design in IFV.

    Both tools run on RHEL3, but you cannot use any IUS or IFV version newer than 6.2 on RHEL3. To use newer versions you would have to upgrade to RHEL4 or RHEL5. Fortunately Verilog and PSL are well supported in 6.2, so you should be able to get started in that version.

    There are some great examples in the tool documentation; we have worked examples, language references and reusable components that you can adapt or play with. Have a look under the "doc" directory in either IUS or IFV. You'll find a bunch of directories called "abvwrite, "abvintro", "abvpslquickref" etc. Have a look at the PDF docs in each directory. You'll also find some examples (labs) in the abvquickstart directory.

    Another good starting point is the Incisive Assertion Library (IAL) that comes with the tools. This is a set of verification components that you can use in your design to verify FIFOs, arbiters etc. They work just fine out of the box, but you can also see the PSL/SVA source code so that you can adapt and learn from them.

    Enjoy!  :-)

  •  Thank you verymuch Stephen. I will follow the same.

    regards,

    Krishna Kishore. 

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