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Internal Error on IUS8.2-b003

Neetha

Hi..

 I have problems in compiling OVM 2.0 methodolgy based code in SystemVerilog.

I am using IUS8.2-b003 tool and getting the following internal tool error at compilation time.

=============================================================================== 

 ncvlog: *F,INTERR: INTERNAL ERROR
-----------------------------------------------------------------
The tool has encountered an unexpected condition and must exit.
Contact Cadence Design Systems customer support about this
problem and provide enough information to help us reproduce it,
including the logfile that contains this error message.
  TOOL:    ncvlog    08.20-b003
  HOSTNAME: eicnxplnx2.einfochips.com
  OPERATING SYSTEM: Linux 2.6.18-8.el5PAE #1 SMP Fri Jan 26 14:28:43 EST 2007 i686
  MESSAGE: function - protovdp vs. protovdp_redeux conflict
-----------------------------------------------------------------
irun: *E,VLGERR: An error occurred during parsing.  Review the log file for errors with the code *E and fix those identified problems to proceed.  Exiting with code (status 255).

 ===============================================================================

Any inputs would be highly appreciated.

 

Regards,

Neetha  

 

Parents

  • Hi Neetha.

    The version you are using is a beta version and is about 1 year old, you should not be using it!

    Please download the latest version (IUS 08.20.012-s) using InstallScape and try again with this version.
    If you still have a problem, please can you contact the support hotline via http://sourcelink.cadence.com/.
    You'll need to send the the error log, and your compilation command. They may need to see the SystemVerilog code as well, if the error message is as non-specific as the one you posted today.

    Regards,
    Steve.

Reply

  • Hi Neetha.

    The version you are using is a beta version and is about 1 year old, you should not be using it!

    Please download the latest version (IUS 08.20.012-s) using InstallScape and try again with this version.
    If you still have a problem, please can you contact the support hotline via http://sourcelink.cadence.com/.
    You'll need to send the the error log, and your compilation command. They may need to see the SystemVerilog code as well, if the error message is as non-specific as the one you posted today.

    Regards,
    Steve.

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