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  3. executing ncsim commands from verilog using system task

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executing ncsim commands from verilog using system task

Arturi
Arturi over 15 years ago

Hi all,

I would like to be able to execute ncsim tcl commands from my verilog code.So intead of sourcing a tcl file at the beggining of the simulation, I would like my design to react on events and source the tcl script on its own.

 something like:

@(posedge event_signal)

$source_tcl_script("./my_ncsim_commands.tcl");

 

I was wondering if cadence has implemeted a system task for that.  Or how could I implement such.

 

Cheers

 

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  • TAM1
    TAM1 over 15 years ago

    The Verilog source code doesn't know anything about the TCL interface that is controlling it. But the TCL does know about the Verilog. So the place to do this is in the TCL.

     

    You can create a TCL breakpoint using the "stop" command that will watch for a signal and execute a command as a result. Before the simulation starts, execute a command like:

     

    stop -condition {#event_signal == 1} -execute { input ./my_tcl_commands.tcl }

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  • eraerfdg
    eraerfdg over 5 years ago

    I 'd also want to know  an answer to that ...

       i.e.  call a  ncsim commnad  from verilog code.

    reason is that    it is not that easy to find how to  educate  vmanager to take a tcl file  in my env ,  but it is  easy to change a verilog file.

     ( all i want is simple  'set severity  to avoid tons of  you have Z /X     on some signal '   that is clutering my log )

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  • StephenH
    StephenH over 5 years ago in reply to eraerfdg

    vManager can easily pass extra options to the simulator, the question really is which one fits your work flow best. You could, for example, create a bash-style script containing one line: "export XRUNOPTS='-input your_tcl_file.tcl'", then add the VSIF attribute "sve_name:/path/to/your/shell_file;". That can even be done interactively when you launch the VSIF, if you can't modify the VSIF for some reason.

    There are other options like adding to run_script, sim_args or other VSIF attributes.

    Trying to make a horrible Verilog-based hack to call Tcl via a backdoor that was never intended for such use is not trivial, and would be best avoided if possible....

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