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*E,OBJACC: Object must have write access: <object name>

prkroon

I am new to the forum so I do not know if the subject I post in this forum is the correct place.

Anyway, During simulation in ncsim I want to force an internal digital signal in the mixed signal design to a certain binairy value.

The signal in question is generated in vhdl and in my opinion a normal digital signal output.

However when I force it during simulation I get the following message:

*E,OBJACC: Object must have write access: <object name>

The <object name> is the signal/pin I force.

I searched in the online ncsim/simvision manuals and cadence site but sofar I could not find the cause of the error message.

So the question is why I can't force this digital signal, other signals in the design I can but some I can not giving me the discussed error message.

  • TAM1

    The NC simulator does a lot of optimizations when it builds its data structures. In the interest of speed, it sets things up without providing for the capability of forcing a value on an internal signal from the TCL command line. In fact, for all we know, the presence of that signal may have been optimized completely away by the elaborator.

    If you want the simulator to set things up so that you can write a value into a signal, you need to provide "write" access to that signal. You can do it on the command line by adding the option "-access w". This may slow the simulation down by a small percentage, but if you are running interactively and forcing signals, that is usually not a problem.

     PS. There are 3 types of access that NC allows the user to control. "read" access allows TCL commands or database probes access to the values on internal signals. "write" access adds more information allowing TCL to put a new value on a signal. "connectivity" access keeps information about how a signal is connected in the design, for use by the schematic viewer for example. You can enable all 3 types of access with the option "-access rwc".

  • prkroon

    TAM1,

    Thanks for the quick response.

    I added -access+rwc to the ncelab cmd and after elaboration I could now force the node(s) in question.

    Sofar I had no problems with forcing digital signals but probably the design I am simulated is optimized by ncelab.

    Can I see in the log files that optimisation was executed or not (sofar did not noticed it)?

     

  • TAM1

    As far as I know, there's nothing that tells you what the optimizer did or didn't do. It will always try to make the simulation run as fast as possible given the kinds of access you tell it you need. The only other kind of access I didn't mention that I commonly use is to add the option "-linedebug." This tells the simulator to keep track of what line of source code it is executing at any particular time and can be useful for single stepping thru the simulation. All of these options can slow the simulator down, so are turned off by default.

  • prkroon

    Ok, thanks for your usefull help! 

     

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