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Generating a verilog netlist

DhavalShah
Hey all, I am just learning Cadence for timing analysis. I need to import a Verilog Netlist in that but I dont know how do i do that. How do I generate a verilog netlist from a schematic?
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  • Anonymous
    Anonymous

    open your dsn file.

    select the dsn file in design resources tab

    Tools > create netlist

    click on "verilog tab" on the top


    Browse location where you want this to be stored and give it a name.

    click OK.

Reply
  • Anonymous
    Anonymous

    open your dsn file.

    select the dsn file in design resources tab

    Tools > create netlist

    click on "verilog tab" on the top


    Browse location where you want this to be stored and give it a name.

    click OK.

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