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Adding $comment into VCD files

I've been reading the version 9.2 of the Verilog-XL reference on system tasks for VCD generation. I have not been able to find a way to automatically insert the $comment VCD structure(which is present in the VCD section of the documentation). Is there a system task in Cadence NC-Sim that will allow insertion of $comment into the VCD output file?

StephenH over 14 years ago

I don't think there's any way to do this.
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