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ncsim: How to display list of Verilog force, from inside Verilog testbench?

The NCSIM console can display a list of all forced signals in the running simulation:

[code]ncsim: force -show;[/code]

Now, I'd like to do the same thing from inside the Verilog testbench. Is there a System/Verilog $systemtask to get the same information?

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