• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Functional Verification
  3. How to use HAL to analyse VHDL files using unisim library...

Stats

  • Locked Locked
  • Replies 0
  • Subscribers 66
  • Views 13425
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How to use HAL to analyse VHDL files using unisim library?

PowerfulBANG
PowerfulBANG over 14 years ago
Hi all: I am using HAL which comes with Cadence IUS 9.20, but I can't analyse VHDL files using unisim library, which belongs to Xilinx, and Cadence does not have this library. So how can I analyse this kind of files ? " library unisim; use unisim.vcomponents.all; " Thanks and Regards
  • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information