Clock phase and frequency checkers using property

Hi ,

I am working on a code to check clock frequency and phase difference of clocks. The code is in verilog however SV features are utilized wit the help of -sv switch. 

I have a CLK and CLB and i want to check their frequencies as well as check if they are 180 degrees phase apart ,I have done in the following fashion , however this checker spans across 3 always blocks and one property definition .Please suggest if there is a better and shorter way to do this.

--------------------------------------------------------------------------

always @ (posedge CLK)

begin

assert property (clock_check(EXP_PERIOD));

end //this checks clock frequency of CLK

----------------------------------------------------------------------

always @(posedge CLB)

begin

assert propertty(clock_check(EXP_PERIOD));

end // this would check frequency of CLKB

-----------------------------------------------------------------------------

always @(posedge CLK)

 begin

    assert CLKB = ~ CLK;

end //This would check that they are 180 degrees out of phase

 -------------------------------------------------------------------------------------------

property clock_check (int EXP_PERIOD)

int start_time

(true,start_time = $time) |=> ($time - start_time == EXP_PERIOD);

endproperty 

I have multiple clocks to check and the propert clock_check is utilized across all the checks.

Thanks ,

 Pooja