Protected Data Types by VHDL 2008

I am trying to compile some VHDL files which contains a protected data type.

I am using Cadence 10.2. I set the library path to the Incisive library path, i.e., $IUSHOME/tools/inca/files. In this folder I check the csd.lib file and the IEEE proposed library. The library is already compiled at the IEEE folder, e.g., $IUSHOME/tools/inca/files/IEEE/.

The compilation command is as follow:

ncvhdl -mess -v200x protectedDT.vhd

I got the error:

 type FLAG_TYPE is protected        -- protected type declaration
                  |
ncvhdl_p: *E,BADTYP (protectedDT.vhd,17|18): expecting a type definition [4.1] [3].
end protected FLAG_TYPE;
            |
ncvhdl_p: *E,PCKNMM (protectedDT.vhd,27|12): package declaration identifier mismatch (PROTECTEDDT/PROTECTED) [2.5].
end protected FLAG_TYPE;
              |
ncvhdl_p: *E,EXPSMI (protectedDT.vhd,27|14): expecting a semicolon (';') [2.5].
end protectedDT;
|
ncvhdl_p: *E,EXPACE (protectedDT.vhd,29|0): expecting a library unit [11.1].
package body protectedDT is
                       |
ncvhdl_p: *E,ENNOPN (protectedDT.vhd,31|23): Intermediate file for package 'PROTECTEDDT' could not be loaded, entity may require re-analysis.
type FLAG_TYPE is protected body   -- protected type body
                  |
ncvhdl_p: *E,BADTYP (protectedDT.vhd,33|18): expecting a type definition [4.1] [3].
   variable flag : Boolean;        -- local variable declaration
          |
ncvhdl_p: *E,BDDECL (protectedDT.vhd,35|10): variable declaration is not a package body declarative item [2.6].
end protected body FLAG_TYPE;
            |
ncvhdl_p: *E,PCBNMM (protectedDT.vhd,53|12): package body identifier mismatch (PROTECTEDDT/PROTECTED) [2.6].
end protected body FLAG_TYPE;
              |
ncvhdl_p: *E,EXPSMI (protectedDT.vhd,53|14): expecting a semicolon (';') [2.6].
end package body protectedDT;
|
ncvhdl_p: *E,EXPACE (protectedDT.vhd,55|0): expecting a library unit [11.1].
end package body protectedDT;
                            |
ncvhdl_p: *E,EXPRIS (protectedDT.vhd,55|28): expecting the reserved word 'IS' [2.6].
        errors: 11, warnings:

The source code  "protectedDT.vhd"

 library ieee;
use ieee.std_logic_1164.all;
-- VHDL-2008 Libraries
use ieee.env.all;
use ieee.std_logic_1164_additions.all; -- include textio_additions
--use ieee.numeric_std_additions.all;
--use ieee.numeric_std_unsigned.all;
--use ieee.fixed_float_types.all;
--use ieee.fixed_pkg.all;
--use ieee.float_pkg.all;

library std;
use std.standard_additions.all;

package protectedDT is

type FLAG_TYPE is protected        -- protected type declaration

   procedure Set;

   procedure Reset;

   impure function Inactive return Boolean;

   impure function Active   return Boolean;

end protected FLAG_TYPE;

end protectedDT;

package body protectedDT is

type FLAG_TYPE is protected body   -- protected type body

   variable flag : Boolean;        -- local variable declaration

   procedure Set is                -- procedure definition

      begin  flag := True;  end procedure Set;

   procedure Reset is              -- procedure definition

      begin  flag := False;  end procedure Reset;

   impure function Inactive return Boolean is -- function definition

      begin  return not flag;  end function Inactive;

   impure function Active return Boolean is   -- function definition

      begin  return flag;  end function Active;

end protected body FLAG_TYPE;

end package body protectedDT;

 Thanks in advance.

I am looking forward for your feedback.

 Regards.