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Using Eplanner with UVM

rdalibor
I am trying to implement checkers in my UVM environment from my vPlan and to map them in Eplanner. However, in the Eplanner I can only see the checks that I implemented as assertions in interfaces but not the checkers I implemented as assertions in my UVM monitor. Could anyone explain me how should I implement checkers in my UVM monitor in order to see them in Eplanner in order to be able to map them.
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  • Hi Steve.

    Yes I was referring to UVM-SV. I implemented your way round the limitation and I was able to map check in the Eplanner. My way round the limitation was to introduce an interface with the signals that are not actually connected to DUT but just used as auxiliary signals which are set from the monitor and then I implemented assertions on those signals in that interface.

    Thank you,

    Dalibor

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  • Hi Steve.

    Yes I was referring to UVM-SV. I implemented your way round the limitation and I was able to map check in the Eplanner. My way round the limitation was to introduce an interface with the signals that are not actually connected to DUT but just used as auxiliary signals which are set from the monitor and then I implemented assertions on those signals in that interface.

    Thank you,

    Dalibor

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