I would like to pass some parameters to my e testbench at run time. Does Specman have the nifty feature of plusargs (what SystemVerilog simulators have). A similar feature would also be welcome.
Yes, starting from Incisive version 13.10, Specman has support for plusargs.
sn_plusarg_exists(arg: string): bool
- will return TRUE if arg is a plusarg on the command line
sn_plusarg_value(arg: string): string
- if there exists a plusarg 'arg' on the command line followed by an equal
sign ('='), then the routine will return the string that follows the
equal sign. Otherwise it will return an empty string