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About timing precision of sdf file simulated in ncsim

daxingxing
Hello Every,
Thank you for your kindness in advance.

Here is my problem

I find my  ncsim can only simualte the sdf file in precision of 10ps （round to 10ps）
For exampe，This is a simple BUF sdf information:
[syntax=verilog](CELL
  (CELLTYPE "BUFCLKHD30X")
  (INSTANCE U10)
  (DELAY
    (ABSOLUTE
    (IOPATH A Z (0.263:0.266:0.266) (0.257:0.259:0.259))
    )
  )
)[/syntax]

When I observe the timing sequence in simvision window, I found the simulator will round the IOPATH delay to 270ps when Z transfering from 0 to 1 because of the changing of A.


In my sdf file the Timescale (unit) is 1 ns. And in my testbench is 1ns/1ps. And according the tools documentation from cadence, the default timing precision of sdf elaberating/compiling is 1fs. I think that means we do not need to set any precision relating compiler option (like sdf_precision 1ps) in ma case. (BTW, I have tried such complier option, but help nothing).

How can I watch/oberseve a delay of 266ps from my simvision waveform window？ Mnay thanks.!
My ncsim version is IES 2012, I thnik it was "latest" enough.

Many thanks.

  • Could it be that the verilog for the buffer cell does not have a timescale directive and therefore the timescale being used for this cell is being inherited from the file compiled prior to it?

    try adding  "-timescale 1ns/1ps" to your elaboration.   The elaborator will then use this timescale for any files that do not have a specified timescale.

  • Hi Mickey,

    Thank you very much! You are much much much clever!

    Yes the problem is in the standard cell verilog file the time resolution is 1ns/10ps!!!

    Thank you very very much!

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