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ncsim: *E,TRSRANGE: range constraint violation (signal update).

zoombarabar

Hello,

I am able to run the simulation without any problems on modelsim. The same testbench on ncsim gives me the error after the simulation starts and runs for about 5us.

Can someone please help me with this? My assumption is that it points to the following two lines of code:

psi5_s <= (ano => ANALOG_Z, ani => psi5_i_s); 

psi5_o_s <= psi5_s.ano;

Any help will be great. 

Best regards, 

Vidya.

Parents

  • Tom,

    you are absolutely right. 

    The problem occurs when I try to assign analog_t variable to a real value in the wrapper (systemverilog <->VHDL). The error disappears when I use casting between the variables.

    Thank you very much for the inputs.

    Vidya.

Reply

  • Tom,

    you are absolutely right. 

    The problem occurs when I try to assign analog_t variable to a real value in the wrapper (systemverilog <->VHDL). The error disappears when I use casting between the variables.

    Thank you very much for the inputs.

    Vidya.

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