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UVM RAL

SuperUVM

I am using Cadence register model. I am trying to randomize a register within model with constraint.

assert( reg_model_hanldle.reg_name.randomize() with { fieldname.value ==  'habcd});

I get an error indicating fieldname is not a class item. Model is generated using Cadence tool .

How do I constraint randomize a register within a model?

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