I need to develop a digital design/verification solution to compile,elaborate and simulate SV designs (basically a complex xrun wrapper). I am an experienced user of xrun and I have done a number of these wrappers over the years but this one is to be more of a tool, intented to be used Company-wise, so it needs to be very well thought and engineered.
It needs to be robust, simple and extensible. It needs to support multi-snapshot elaboration, run regressions on machine farms, collect coverage, create reports, etc.
I've been browsing the vast amount of documentation on XCELIUM and, although very good, I can't find any document which puts together all the pieces of what I am trying to achieve. I suppose I am more clear on the elaboration, compilation and simulation part but I am really lacking on the other areas like : LSF, regressions coverage, where does vManager fits in all this, etc.
I'd appreciate if someone can comment on whether there is a document which depicts how such a DV flow can be put together from scratch, or whether there is a kind of RAK with some example xrun wrapper.
There are lots of RAKs for the various use cases (UPF, MSIE, etc). We don't ship a generic one-size-fits-all flow because it would be far too complex. I doubt we can discuss all your requirements on a public forum like this, so why not ask your local Cadence verification AE to get in touch. If you're not sure who your local AE is, PM me with your company email and details, and I'll find someone who can help you.
Thanks Stephen. I will PM you
Hi Stephen, sent you a PM