How do we extract a full path design from Scoreboard when there is a `uvm_error?
my_module has the following assigments: (array of virtual interfaces, while each VF accepts data and data enable signals, with unique names)
assign my_module_internal_vif[#num].data_en = main_tb.<unique_name_per_each_signal> assign my_module_internal_vif[#num].data = main_tb.<unique_name_per_each_signal>;
While there is a `uvm_error which happens in Scoreboard, I have the trans object (which is sent from the monitor). The trans has a field with instance number, but it doesn't monitor the signals themselves.
I have the #num or thre error.
My objective to to extract with a kind way, the full path design as a string and print it, given the number of the instance, i.e, when there is a `uvm_error, from trans[#num ], recognize my_module_internal_vif[#num] and then print the full path design which indicates which data enable was triggered and which data was compared.
Thanks for your help!
Unfortunately SystemVerilog doesn't have any mechanism to do introspection (i.e. to query the structure of the design or get information about the source code), so there's no way to query to find the <unique_name_per_each_signal> as in your example. The best you can do is perhaps to store some kind of string with each monitor or transaction to indicate which signal group it came from.
That said, if you stop the simulator on the UVM error, you should be able to inspect the contents of the monitors and VIFs to see what physical signals they point to.
I have a note on "SystemVerilog doesn't have any mechanism to do introspection". I started this: https://github.com/tudortimi/reflection
It's by far not complete and probably won't work in this case, as it's mostly focused on classes, but could be extended.
Ooof! You are a brave man Timi (or crazy). VPI is hard enough at the best of times, but calling it from SV? Wow! :D