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  3. signal transmission problems of CDC check

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signal transmission problems of CDC check

liangli
liangli over 4 years ago

Hi:

  Reg 2 has two clocks available, which one is used is determined by the a signal. I want to do a cross-clock domain path analysis from reg 1 to reg 2 When reg 2 uses clk 1,and use “check_cdc -signal_config -add_constant {{a 1'b0}}” could to set a to zero , But this value will not be passed to b(Q port of reg 0), Jaspergold will recognize that reg 1 and reg 2 are in different clock domains,But in fact reg 1 and reg 2 are in the same clock domain

  How should I modify the jaspergold script?

thank you!

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  • bijitendra
    bijitendra over 4 years ago

    Hi Liangli,

    The reason for CLK_1 not being selected even though you are forcing the signal 'a' as '0' is that constant propagation is not happening. In the example, the flop Reg_0 looks to be non-resettable. If the flops are non-resettable, you have to specify 'reset -none' before running CDC analysis so that the constant value is propagated from 'a' to 'b'. If you are using flops that have a reset/CLR pin, then you need to declare those reset signals using the following command:

    config_rtlds -reset -async {reset signal name}

    Proper constant propagation will happen only when you have correct reset declarations.

    Hope this helps. Feel free to send emails directly to me if you have more questions. My email is bijitm@cadence.com.

    Thanks,

    Bijit

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  • liangli
    liangli over 4 years ago in reply to bijitendra

    Hi  bijitendra 

      I finally found the reason, In addition to using "config_rtlds -reset -async rst_n -polarity low" to define the reset signal, you also need to use "reset ~rst_n" to define the reset signal,The lack of "reset ~rst_n" constant signal will not pass through the register

    thank you very much!  

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  • bijitendra
    bijitendra over 4 years ago in reply to liangli

    Hi Liangli,

    Thanks for the confirmation. What version of the tool are you using? In the latest version, you need not declare reset using both 'reset' command and 'config_rtlds -reset' command for structural analysis. Using any one is sufficient. We recommend using 'config_rtlds -reset' command for structural analysis since it has some additional benefits compared to reset command which is necessary for functional analysis. 

    Let me know if you have more questions.

    -Bijit 

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  • bijitendra
    bijitendra over 4 years ago in reply to liangli

    Hi Liangli,

    Thanks for the confirmation. What version of the tool are you using? In the latest version, you need not declare reset using both 'reset' command and 'config_rtlds -reset' command for structural analysis. Using any one is sufficient. We recommend using 'config_rtlds -reset' command for structural analysis since it has some additional benefits compared to reset command which is necessary for functional analysis. 

    Let me know if you have more questions.

    -Bijit 

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  • liangli
    liangli over 4 years ago in reply to bijitendra

    Hi  bijitendra

      the version is V2020.03

      I tested the complex circuit. In the case of setting the reset signal, there are still cases where the constant value cannot pass through the register.Simple circuit is no problem

     

    thank you!

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  • bijitendra
    bijitendra over 4 years ago in reply to liangli

    Hi Liangli,

    Thanks for sharing the version. The version you are using is almost an year old. I would recommend you to move to a more recent version. Also, for the other scenarios that you are seeing where constant propagation is not happening, there can be several reasons for that. Can we take a look at the issues together? I can setup a webex meeting at your convenience. Please share your email and a convenient date/time and I'll set up the meeting. 

    Thanks,

    Bijit

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  • liangli
    liangli over 4 years ago in reply to bijitendra

    Hi bijitendra

      I found a very strange problem, "check_cdc -signal_config -add_constant {{ a 1'b1}}" When the force of point a is 1, the value will not be passed down through the register. "Check_cdc -signal_config -add_constant {{ a 1'b0}}" When the force of point a is 0, the value can be passed down through the register。Other conditions are exactly the same。

    thank you!

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  • bijitendra
    bijitendra over 4 years ago in reply to liangli

    Hi Liangli,

    Can I take a look at the problem? This may be due to the way a formal tool propagates constants w.r.t. the reset value of the flop. However, I need to see the problem first. Let me know if it is possible to have a meeting. Thanks!

    Bijit

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