Stats

  • Locked Locked
  • Replies 1
  • Subscribers 66
  • Views 8104
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

SystemVerilog count the $error() output during simulation

HoWei

When running SystemVerilog verifcation simulations (Virtuoso + Xcelium) I have certain conditions for which I want to produce an "$error()" output in the xrun logfile.

Just before the simulation is finished I want to write out how many of those "$errors()" occured.

Currently I am running a manual error counter in my testbench - but this does not help when a SV module in a lower hierarchy creates an "$error()" output.

1. What options do I have to automatically count (or summarize) the number of "$error()" thrown during simulation (from any hierarchy below - not only in testbench) ?

2. Is there another way to throw and count custom-errors during simulation (I am not familiar with this UVM thing) ?

  • I'm not aware of any built-in method to count arbitrary $error calls.

    Xcelium has an option to translate $error into UVM_ERROR macro calls, but that only helps if you're using UVM for the testbench.
    In principle you can use VPI calls to override the definition of $error, but that's non-trivial and makes your code hard to integrate with anyone else's code if they rely on the built-in $error.

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.