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PSL Assertion

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Is it useful to write the psl assertions for checking the CRC? How I can write the PSL assertion for interface signal between two modules? Any Example?


Originally posted in cdnusers.org by vlsi_dude
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  • I am writing psl assertion for interfacing signals from one module to another module.
    Like if Module A has signal sigA1 which is connected to Module B of signal sigB1, then i have written

    property prop1 = always (A.sigA1 == B.sigB1)@(posedge CLK);
    assert prop1;

    Whether this is the correct way to write for interface signal or any other method we can use?
    Also Whether this type of assertions are useful?

    Thanks


    Originally posted in cdnusers.org by vlsi_dude
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  • I am writing psl assertion for interfacing signals from one module to another module.
    Like if Module A has signal sigA1 which is connected to Module B of signal sigB1, then i have written

    property prop1 = always (A.sigA1 == B.sigB1)@(posedge CLK);
    assert prop1;

    Whether this is the correct way to write for interface signal or any other method we can use?
    Also Whether this type of assertions are useful?

    Thanks


    Originally posted in cdnusers.org by vlsi_dude
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