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interdependent constraints

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Hi,
  In my design there are say two signals apart from other signals.  req_val, req_cntl.
  The req_cntl is only valid if the req_val is asserted or say high.

  For some assertion say I don't want req_val to get asserted. Hence I constrain it to 0 (low).

  So does it make sense to leave req_cntl unconstrained especially if the width of req_cntl is high(say 5).

  Or to be specific leaving req_cntl unconstrained, will IFV try to explore the assertions for the different values of req_cntl (i.e. 2 ** 5) values?

thanks,
Rajendra
 


Originally posted in cdnusers.org by rajendraorpe
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