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  3. System Verilog ... for dummies

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System Verilog ... for dummies

archive
archive over 19 years ago

I am planning to use System verilog - not System C - for writing a test for a SOC ASIC. I am looking at Cadence online documentation and I can find just ncverilog and systemc, not system verilog. This confuses me: I do not want to go that far with System C, so I like System Verilog which let me have a resonable learrning curve: I still have the ability to either design synthesizeable logic with verilog 2001 AND write mid-to-high level verification code in the system verilog without referring any object code - either SystemC or C++ - in the simulation model, just compiling everything.

Question is: how do I compile Sytem verilog in a Cadenc e simulation environment? I acannot find the keywords 'system verilog' in the cdsdoc engine either ...

many thanks in advance


Originally posted in cdnusers.org by marco.stanzani
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    archive over 19 years ago

    | apollo stanzani:coyote > ncvlog -version
    | TOOL: ncvlog 05.10-s017


    The version reported is five dot one, not five dot ten which it looks like. The "s017" denotes the incremental release of that version based on bug fixes, etc. that have been applied. Since the release is quite old, there have been quite a large number of releases.

    The latest version available is IUS57-s001. This has quite a bit of SV support in it, so you'll want to be sure to read the SystemVerilog: What's New reference.

    You can download the latest version from http://download.cadence.com.

    Tim


    Originally posted in cdnusers.org by tpylant
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  • archive
    archive over 19 years ago

    | apollo stanzani:coyote > ncvlog -version
    | TOOL: ncvlog 05.10-s017


    The version reported is five dot one, not five dot ten which it looks like. The "s017" denotes the incremental release of that version based on bug fixes, etc. that have been applied. Since the release is quite old, there have been quite a large number of releases.

    The latest version available is IUS57-s001. This has quite a bit of SV support in it, so you'll want to be sure to read the SystemVerilog: What's New reference.

    You can download the latest version from http://download.cadence.com.

    Tim


    Originally posted in cdnusers.org by tpylant
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