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Does OVM methodology supports Module based SV

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Hi..
       we all know that OVM is the open verification methodology introduced by both cadence & mentor by combinig URM +AVM.
        what  I know is OVM has been introduced for  class based systemverilog.

doubt:
          Does OVM supports module based systemverilog or not?


Originally posted in cdnusers.org by raghavendrap
Parents

  • The joint development of OVM between Cadence and Mentor is focused on a common SystemVerilog Class Library and Class-based methodology. Cadence is committed to ensure that OVM will work with the rest of the Plan to Closure Methodology components, including SystemVerilog Module-Based URM as well as eRM. Since the Module-based approach does not require a class-library, there is not a dependency on the OVM classes, and Cadence is working to ensure that other dependencies like test-phases, debug messages, etc... will be consistent with OVM. Of course, the Module-based approach is also based on standard SystemVerilog, so any VIP developed using the Module-based approach will not only run on any IEEE1800 compliant simulator but also plug & play with both OVM and eRM VIP.

    Our customers have told us that there are distinct implementation needs for engineers coming from a verilog, rtl programming background vs. an object-oriented, software programming background. This is why within the Plan-to-Closure methodology(IPCM) we provide different implementations yet they can still work together. These needs -- and our parallel approaches -- continue forward with OVM.

    Mike


    Originally posted in cdnusers.org by mstellfox
Reply

  • The joint development of OVM between Cadence and Mentor is focused on a common SystemVerilog Class Library and Class-based methodology. Cadence is committed to ensure that OVM will work with the rest of the Plan to Closure Methodology components, including SystemVerilog Module-Based URM as well as eRM. Since the Module-based approach does not require a class-library, there is not a dependency on the OVM classes, and Cadence is working to ensure that other dependencies like test-phases, debug messages, etc... will be consistent with OVM. Of course, the Module-based approach is also based on standard SystemVerilog, so any VIP developed using the Module-based approach will not only run on any IEEE1800 compliant simulator but also plug & play with both OVM and eRM VIP.

    Our customers have told us that there are distinct implementation needs for engineers coming from a verilog, rtl programming background vs. an object-oriented, software programming background. This is why within the Plan-to-Closure methodology(IPCM) we provide different implementations yet they can still work together. These needs -- and our parallel approaches -- continue forward with OVM.

    Mike


    Originally posted in cdnusers.org by mstellfox
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