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  3. Open Verification Methodology - OVM

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Open Verification Methodology - OVM

archive
archive over 18 years ago

Hi everyone,

Most people have probably seen the announcement that came out this week on the new, open-source, Open Verification Methodology (OVM) sponsored by both Cadence and Mentor. You can check out  the press release for more information. There is also an EETimes article on OVM that is worth reading.

Discussion is already brewing on OVM so here is your chance to take the podium:

- OVM: Hot or hype?
- What challenges that you are currently facing will be facilitated by an open verification methodology?
- Will OVM be a catalyst for the adoption of SystemVerilog? Why [not]?
- What are you hoping to see become part of OVM?

Let's hear it!

-Stelix.


Originally posted in cdnusers.org by stelix
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  • archive
    archive over 18 years ago

    BTW, make sure to also check the mirror discussion on OVM in the SystemVerilog forum: http://www.cdnusers.org/Forums/tabid/52/forumid/66/postid/5127/view/topic/Default.aspx


    Originally posted in cdnusers.org by stelix
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  • archive
    archive over 18 years ago

    BTW, make sure to also check the mirror discussion on OVM in the SystemVerilog forum: http://www.cdnusers.org/Forums/tabid/52/forumid/66/postid/5127/view/topic/Default.aspx


    Originally posted in cdnusers.org by stelix
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