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  3. eVC AHB: use of get_first_address()

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eVC AHB: use of get_first_address()

archive
archive over 18 years ago

Hello,

I'm using the eVC AHB. I would send a write burst starting from a random address and read back the data starting from the same address of the write transaction. I saw that in the vr_ahb_master_driven_burst.e there is the method get_first_address(). I tried to use it in the following way:
        
         var rd_first_addr : vr_ahb_address;
         rd_first_addr = burst.get_first_address();


but I get the error message: Cannot access method 'get_first_address' of package 'vr_ahb'.
While using :  rd_first_addr = write_burst.first_address; works fine.
The method get_first_address(); returns the firs_address, I do not understand why I get the error message when I compile the e code.
In the same test I call a different method defined in the same file (e.g. .get_transaction_bursts()) that works properly.

Many thanks,

David.
   



Originally posted in cdnusers.org by dvincenz
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  • archive
    archive over 17 years ago

    Hi Hilmar,
    Thanks a lot. 2 master and one slave AHB environment. i configured AHB evc with hdl source directory. actually my intension is to check AHB bus ( Arbiter, mastermux and decoder). I configured 2 master evc and 1 slave evc, then my dut is AHB bus. now i'm doing testcase for the same. My intension to control hbusreq signal. because i couldn't seen hbusreq signal details in ahb_evc pdf. probably, i think that req_delay, but i'm not getting proper deatils abt this. if possible can u give me brief abt this.


    Originally posted in cdnusers.org by vlsi_dude
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  • archive
    archive over 17 years ago

    Hi Hilmar,
    Thanks a lot. 2 master and one slave AHB environment. i configured AHB evc with hdl source directory. actually my intension is to check AHB bus ( Arbiter, mastermux and decoder). I configured 2 master evc and 1 slave evc, then my dut is AHB bus. now i'm doing testcase for the same. My intension to control hbusreq signal. because i couldn't seen hbusreq signal details in ahb_evc pdf. probably, i think that req_delay, but i'm not getting proper deatils abt this. if possible can u give me brief abt this.


    Originally posted in cdnusers.org by vlsi_dude
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