• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Functional Verification
  3. how to create memory model using vr_ad

Stats

  • Locked Locked
  • Replies 5
  • Subscribers 64
  • Views 13901
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

how to create memory model using vr_ad

archive
archive over 18 years ago

Hi,

    I wanted to know how i can create a memory model using vr_rd package.

--srik.


Originally posted in cdnusers.org by srik
  • Cancel
  • archive
    archive over 18 years ago

    Hi Srik.

    Have you used vr_ad at all before? If not, I suggest you read the documentation and look at the examples that come with vr_ad.
    The vr_ad (and the documentation) is part of IPCM, so get that first if you don't have it.

    vr_ad lets you model really simple sparse memories by default, and also lets you overlay an e struct onto the memory, to give you a structured way to address the memory.

    I've pasted a snippet from the IPCM6.1 docs to get you started:

    Utilities

    4 Register and Memory Modeling Package

    4.7 Sparse Memory

    4.7.1 Instantiating a Memory


    To instantiate a memory:

       1. Extend vr_ad_mem_kind, and add a new kind (according to eRM naming conventions).

          For example, you could add the kind EX_MEM as follows:
          extend vr_ad_mem_kind : [EX_MEM];
       2. Extend the relevant unit by adding a field of the specific vr_ad_mem subtype, and constrain the memory to the appropriate size.

          For example, you could set a 1Kx64 memory as follows:
          extend ACTIVE SLAVE vr_xbus_agent {
              mem : EX_MEM vr_ad_mem;
                  keep mem.size == 0x1024;
                  keep mem.addressing_width_in_bytes == 8;
          };

       3. Add the memory to the address space using add_with_offset() (same as adding a register file)

          For example, assuming that the memories of the slaves are mapped in consecutive addresses, you could map all active XBus slaves as follows:
          extend vr_xbus_env {
              post_generate() is also {
                  for each (slave) in active_slaves {
                      addr_map.add_with_offset(index*1000,slave.mem);   
                  };
              };
          };


    Hope this helps!

    Steve.


    Originally posted in cdnusers.org by stephenh
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • archive
    archive over 18 years ago

    Thank you steve.

    --Srik.


    Originally posted in cdnusers.org by srik
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • archive
    archive over 17 years ago

    I would also look at another option - defining your memory as a list of regs. Very useful if the data is constructed from meaningful fields. For example :

    reg_def YYY {
    -- NAME TYPE R/W RESET Cover
    reg_fld reserved: uint(bits:7) : R : 0 ;
    reg_fld valid : bit : RW : 0 : cov;
    };

    extend XXX vr_ad_reg_file {
    memory_l[512]: list of YYY vr_ad_reg;

    post_generate() is also {
    for each in memory_l do {
    add_with_offset(OFFSET + 2_000 +(index*4),it);
    it.reset();
    };
    };
    };


    Originally posted in cdnusers.org by thinkverification
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • archive
    archive over 17 years ago

    The last suggested method for the modeling is generally used to model the actual register space of the DUT.
    As suggested we can define the register and its fields by reg_def and reg_fld macro.
    A very good explanation is given for using the same in vr_ad document.

    If memory is constructed with some meaningful field than we can create the objects with mem_obj_def macro and than fields can be created inside.

    For Ex:

    mem_obj_def obj-name {
    mem_fld field-name : field-type [: cov];
    };

    A very good explanation is given in vr_ad document under the heading "Storing Complex Structures in Memory".

    --
    Regards,
    Gaurav Patel
    ASIC Engineer.
    www.einfochips.com


    Originally posted in cdnusers.org by er_gauravpatel
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • archive
    archive over 17 years ago

    Thanks for pointing this out, Gaurav.

    However, I've found that using list of vr_ad_regs to model memory is very convenient for modeling indirect access memories where the "indirect-data-write" register is of the exact same type as the list of vr_ads. You only have to define field structure once.


    Originally posted in cdnusers.org by thinkverification
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information